The CFT 16-bit Homebrew Mini Computer
The CFT is a long-term project built in my Copious Free Time
74xxx integrated circuits. Check out the project log for more rambling discussions of individual parts of the project. This page is now lagging behind the state of the project. Be sure to check the project log for up-to-date information. You could also follow @CFTproject on Twitter for more regular updates, check out all the photos and screenshots on Flickr, or visit the Facebook CFT 16-bit Mini-Computer page for a little bit of both. For now, you may download the Programmer’s Guide which is a software-side description of the architecture, or the bus guide which describes the two buses in use by the processor and CFT computer. Or you can read on. CFT Programmer’s Guide (revision F)Download this file. (259 KBytes) CFT Bus Guide (revision E)Download this file. (151 KBytes) CFT Front Panel Guide (revision D)Download this file. (9.98 MBytes) CFT Assembler Guide (revision A)Download this file. (77 KBytes) ==What is it?== Here’s the obligatory bullet point list:
- A CPU heavily inspired by the PDP8.
- 16-bit word length without byte-addressable memory. Word. (see what I did there?)
- Very basic instruction set, though much less basic than the PDP8’s — since we don’t use core memory, the instruction set’s defining decisions would be very different anyway.
- PDP8-style ‘microcoded’ instructions, which allow many small instructions in one. For instance,
RBL(roll bit left) may be combined with
CLL(clear Link/Carry) to make the
SBL(shift bit left) instruction.
- Microcoded design.
- 16-bit address space (65,536 words of memory).
- Interrupt support.
- Front-panel support.
- All implemented with
74xxxchips like those found in the Sixties and Seventies — no PALs, GALs, CPLDs or FPGAs except in any stock peripherals I happen to connect. I want it dirty, messy, and radiating heat.
- No operating system to speak of, although a Forth 83-like language is in development and everyone knows Forth makes a great operating system.
- A retro logo.
- My main aim is to make something I’ve wanted to for a very long time: a computer. I got to see computers in the Eighties, but the self-built computer craze bypassed me because I was living in the wrong country and without anywhere near enough money to get the components I’d have needed. Now, the same components cost much, much less, and I have all the necessary tools to get started.
- I’d also like to relearn hardware description languages (currently Verilog as I have an inexplicable hate-hate relationship with VHDL).
- Learn how to make dense PCBs. I’ll be trusting the manufacture to a capable third party.
- Code a Forth, something I’ve been looking for an excuse to do in ages.
- In this day of fantastically high-level languages like Python, I’d like to keep (if not hone) my awareness of low-level coding.
- Learn more about the practical side of digital electronics.
- Get to grips with CPU design and interfacing — find out where all those seemingly stupid decisions in CPU design originate from by trying to minimise costs and PCB area.
- Use up some of those ancient components I’ve been collecting.
==What do I have to Show for Myself Now?== Not much is ready to be published, but quite a lot has been done.
- A microcode assembler tool which will be published as a separate page.
- A function table assembler for ROMs, EPROMs, EEPROMs and other non-volatile memories. This was used to assemble the ALU function tables and will also be released separately.
- The architecture design.
- A description of the core hardware of the processor and some basic I/O devices in Verilog. The design is not meant to be synthesised. Rather, it’s composed of interlinked descriptions of 74xxx chips for verification purposes.
- A description of the computer’s bus with its pins. I already have a weathered Eurocard backplane handy.
- Circuit schematics corresponding to the Verilog description for the CPU.
- PCB designs corresponding to the circuits.
- A testbed facility for the Verilog source, including a test suite.
- A fast emulator for the architecture built in C, with some debugging facilities.
Currently it’s a bit of a task keeping all of this in sync as I find bugs in one that influence the others, but things are slowly settling down. ==Some Images== Here are a few screenshots, photos and the like from various stages of the project.