The CFT is a long-term project built in my Copious Free Time While I'm reintegrating CFT documentation onto this site, feel free to amuse
yourself with this glorious bullet point list.
integrated circuits. Check out the project log
for more rambling discussions of individual parts of the project. This page is
now lagging behind the state of the project. Be sure to check the
project log for up-to-date information. You could
also check out all
photos and screenshots on Flickr, the
Google Plus page, or visit the Facebook CFT 16-bit Mini-Computer page.
RBL (roll bit left) may be combined with
CLL (clear Link/Carry) to make the
SBL (shift bit left) instruction.
74xxx chips like those found in
the Sixties and Seventies — no PALs, GALs, CPLDs or FPGAs except in
any stock peripherals I happen to connect. I want it dirty, messy, and
radiating heat. Update: this was relaxed a bit to keep the number of
boards down. The video card uses a CPLD (this saved five to six
boards) and the remote testing and debugging controller uses a
microcontroller to save maybe three or four boards.
What do I have to Show for Myself Now?
Not much is ready to be published, but quite a lot has been done.
While I'm reintegrating CFT documentation onto this site, feel free to amuse yourself with this glorious bullet point list.
- A microcode assembler tool which will be published as a separate page.
- A function table assembler for ROMs, EPROMs, EEPROMs and other non-volatile memories. This was used to assemble the ALU function tables and will also be released separately.
- The architecture design.
- A description of the core hardware of the processor and some basic I/O devices in Verilog. The design is not meant to be synthesised. Rather, it's composed of interlinked descriptions of 74xxx chips for verification purposes.
- A description of the computer's bus with its pins. I already have a weathered Eurocard backplane handy.
- Circuit schematics corresponding to the Verilog description for the CPU.
- PCB designs corresponding to the circuits.
- A testbed facility for the Verilog source, including a test suite.
- A fast emulator for the architecture built in C, with some debugging facilities.
Currently it's a bit of a task keeping all of this in sync as I find bugs in one that influence the others, but things are slowly settling down.