The design of Fungus intentionally resembles a simpliﬁed version of
the MIPS R×000 architecture. The data path is built around a register
ﬁle and an arithmetic/logic unit (ALU). Like the MIPS, all Fungus
instructions involve the ALU and almost all involve the register
ﬁle. Here is an explanation of the constituent parts, as outlined in
the ﬁgure below:
Register File (RF).
A 8×18-bit RAM containing the values
of the eight 18-bit registers of the CPU. The register ﬁle (RF) has
two read (output) 18-bit ports A and B and one write (input) 18-bit
port C. Each port can address independently any of the eight registers
by means of three sets of three address lines each. An additional
latch line clocks data from the input port into the register addressed
by the C address lines.
Arithmetic/Logic Unit (ALU).
This has two input ports (A and B) and one output port (C), all 18
bits wide. It also has three control lines to select the operation to
be performed. The result of performing the selected operation on the
two input ports appears on the output port after a certain
stabilisation delay. An additional pair of control lines selects the
current mask mode.
Memory Address Register (MAR).
This 18-bit register can only be written by the CPU. It buﬀers
and outputs an 18-bit address to the system's address bus. A control
line latches data from the ALU's C (output) port into this register
when this is required. The output of the MAR is tri-state, so that the
address bus is only driven when needed, and left floating (in the
high-impendance or Z state) at all other times.
Memory Register (MR).
This register buﬀers and makes available data read from or
written to system memory. This register has three ports. One is
tri-state (bi-directional) and directly connected to the system's data
bus; the other allows values from the ALU's C (output) port to be
written to the register; and the third allows values to be read from
Instruction Register (IR).
This register is connected to the
system's data bus and is latched during the fetch cycle. It contains the
instruction word currently being executed. This is connected to the control
unit and, indirectly, to the ALU.
A port multiplexer (A MUX).
The A multiplexer selects one of two data sources
for the ALU's port A. The two choices are the RF's A port (using a
register's value as the left-hand operand); and the contents of the MR
register (to access data read from memory). A single control line
chooses among the two.
B port multipexer (B MUX).
Like the A multiplexer, this unit selects among
diﬀerent data sources for the ALU's right-hand operand. There are
three choices here: the value of the RF's B output port (to access a
register's value); a value drawn from the current Instruction Register
(IR), as processed by the Vector Control (VC) unit (to access literals
embedded in the current instruction); or a value from the Constant
Store (CS) ROM unit, to use a hardwired constant value. Two control
lines choose among the three sources.
Vector Control (VC).
This unit takes the literal 9-bit ﬁeld the IR and either outputs
it as a rd literal to the ALU, or copies the nine bits to both wo and
rd and outputs the entire word to the ALU. This allows a 9-bit literal
L to be used either as a scalar literal or as the
vector (L,L). Combined with ALU masking modes, this unit can
serve a number of functions. A single control line selects the
behaviour of this unit.
Constant Store (CS).
This small 18-bit ROM contains a number of constants used in
processing pico-code and other things. Scalars like 1, -1 and
vectors (1,1) and (-1,-1) are stored
permanently in this ROM. Combined with masking modes in the ALU, this
implements useful features and simpliﬁes the CPU pico-code.
Control Unit} (CU).
This unit is driven by the contents of the IR. It contains a ROM
containing Very Long Instruction Word (VLIW) pico-instructions. Each
bit of a pico-instruction directly drives one of the control signals
controlling the various units of Fungus. A pico-PC steps through the
ROM executing pico-instructions.