Fungus is a Reduced Instruction Set Computer (RISC). The instruction set is as small as possible. There are 26 instructions and they are all one word wide. Instructions are not executed in a single clock tick. They range from three to eight cycles1, with most instructions needing three.

Addressing Modes

Fungus does not have the usual large family of addressing modes. In fact, the mention of addressing modes with respect to this architecture is officially deprecated. However, in the interest of providing an explanation to users hopelessly lodged in this paradigm, here is a list of ‘addressing modes’:

Immediate.

An instruction operates on a literal, storing the address in a register.

Indexed.

An instruction accesses memory by applying an arithmetic or logic operation on two register values, and using the result as the memory address. The result of the instruction is stored in the target register.

Register.

An instruction operates on one or two registers, storing the result in a third, target register.

Masking Modes

Since Fungus is a ℤ² machine, it needs to deal with vector values, but also with their ordinates in an independent fashion. To provide necessary facilities, it also needs to access words as scalar values. This duplication of functionality would increase unacceptably the size of the instruction set. Thus, in the interest of additional obfuscation, masking modes were introduced. Not to be mistaken with addressing modes, masking modes modify the semantics of instructions as follows:

Vector mode.

This is the default. The wo and rd parts of a word are treated independently. Literals are written like (123,456) (although this is not necessary; the same literal could still be written 123456). The result of 777000 + 001001 would be 000001. In vector notation: (777, 0) + (1, 1) = (0, 1).

X mode.

This mode masks the wo (y ordinate) part of words. In this way, all instructions affect only the rd (x ordinate) part of data. In this context, the addition (777, 0) + (1, 1) yields (777, 1).

Y mode.

As above, but the rd (x ordinate) part of data is masked, making it immutable.

Scalar mode.

Treats words as scalars. In scalar mode, the addition 115333 + 225511 would yield 343044 (note how the carry crosses the wo-rd boundary).

Instruction Format

There are two groups of instructions: group 0 involves a target register and 9-bit literal; group 1 involves a target register and one or two source registers. The two groups are illustrated in the figure below:

The formats themselves are as follows:

Group 0.

Comprises of the following fields (in order of increasing significance):

• L: 9 bits. A 9-bit literal argument.
• X: 3 bits. The target register.
• OP: 3 bits. The instruction opcode.
• M: 2 bits. Masking mode.
• 0: 1 bit. The instruction group (always 0).

Group 1.

Comprises of the following fields (in order of increasing significance):

• B: 3 bits. For binary instructions, the register used as right-hand operand. For unary instructions, this field acts as an extension of the ALU field.
• A: 3 bits. The register used as left-hand operand.
• ALU: 3 bits. The ALU op code.
• X: 3 bits. The target register.
• OP: 3 bits. The instruction opcode.
• M: 2 bits. Masking mode.
• 1: 1 bit. The instruction group (always 1).

Masking modes (the M instruction field) are as follows:

• 00 is the scalar mode, denoted in Assembly by the .s suffix.
• 01 is the rd (X) mode. Assembly suffix: .x.
• 10 is the wo (Y) mode. Assembly suffix: .y.
• 11 is the default, vector mode. Assembly suffix: .v (or none, as it is the default)

The complete Fungus instruction set is shown in the following figure.



Underlined operations are subject to the current masking mode. For simple operations like ALU operations, the masking mode applies to the the entire instruction.

• 1. Potential erratum: this estimate was made before enough investigation into the practicalities of the design was carried out. It is a decent ballpark figure based on other CPUs.